A Dickson Charge Pump with Gate-Drive Enhancement and Area Saving

This paper presents a novel charge pump scheme, which combines the advantages of Fibonacci and Dickson charge pumps together, to obtain 30 V voltage for display driver IC application. This design only needs four external capacitors, which is more suitable for smaller package application such as smart card display. By using a voltage doubler charge pump with a pulse skip regulator, high amplitude (<6.6 V) clocks are produced to enhance the gate-drive of a Dickson charge pump and then improve the system current drivability. This regulation engages more middle-voltage (MV) devices and about 30% of chip size is saved. Further optimization tends to flying capacitors to decrease the total chip size by 2.1%. Besides, a precise and simple model for one-stage Fibonacci charge pump with current load is proposed for further efficiency optimization. In a practical design, its voltage error can be within 0.12% for 1mA current load, and it keeps at 2.83% error even for 10 mA current load. Based on a 0.11 μm 1.5 V/6 V/32 V process, this charge pump is fabricated and two regulators, a pulse skip one and a linear one, are operated to keep the charge pump’s output to 30 V. Performances of ripple, efficiency, line regulation and load regulation for the two regulators are investigated.